Specifications and Topology
Based Circuit DesignThe phase shifter was to be of 4 bits with particularly wide bandwidth, as required by radar systems tasked with acquiring frequency-dependent target response and multipath signals [23]. At first sight, these specifications would suggest that an analog phase shifter of the distributed periodic capacitor load type (discussed in Section 5.2.1) might be called for. Examination of these phase shifters, however, reveals that the amount of phase shift (or time delay) they can produce is rather small. Indeed, since the phase shift is a function of the change in the bridge capacitance loading the line?
and this change is preferably attained prior to pull-in?pull-in avoidance limits the working capacitance change. For instance, Kim et al. [23] point out that with the analog phase shifter the maximum delay change for an 87-ps line would only be 4 ps. The other aspect of the intended application is the wide bandwidth capability. This, as discussed in Chapter 4, may be achieved only with TTD implementations. Therefore, the topology chosen for this application was the switched-line TTD phase shifter.


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