The assembled 4-bit MEM phase shifter circuit is shown. As observed in the circuit schematic of Figure 5.3, connections to ground play a prominent role in this design. However, the fabrication technology employed lacked vias to ground. As a result, the circuit was laid out so that the connections to ground could be implemented with wrap-around grounds at the edges of the chip. To minimize the inductance of this connection, which would have been made through 21-mil-long ribbons, small carrier plates 20-mil-thick were mounted next to the chips for grounding, resulting in grounding ribbons of only 5 mil in length.
The chips, in turn, were mounted to gold-plated Kovar carriers with conductive epoxy. To exploit automated testing facilities, CPW-to-microstrip line transitions were also mounted on the carriers with epoxy and ribbon was welded to the input and output. This is indicated in Figure 5.4. The measured performance of the circuit was as follows. The average insertion loss was 1.4 dB at 8 GHz, with a loss of 1.7 dB over greater than 30% bandwidth. The return loss was greater than 11 dB for all 16 phase shift states, and the chip-to-chip variation was within 0.3 dB.
(1) The chip-to-chip variation at higher frequencies was caused by mismatch loss related to variations in the assembly.
(2) The parasitic capacitance of the MEM switches between the switch posts and the transmission lines contributed to the phase error, which could be as high as half the least bit, which can be lowered by shortening the line lengths.
(3) The couplers were responsible for approximately 60% of the total loss. This was attributed to the lossy properties of the silicon wafer utilized; therefore, their realization in insulating substrates (e.g., alumina-based coupler) were expected to exhibit 0.2-dB lower loss.
(4) The development of a technology including vias should contribute to a simpler assembly and a more compact unit.