CkBooks Online – Free Online Books

The devices were prototype vehicles tested using wafer probing techniques and were not packaged. It is clear, however, that packaging techniques and considerations similar to those employed in the phase shifter case studies previously discussed would be applicable. A photograph of the 4-bit RF MEMS TTD phase shifter is shown. The total area of the chip was 6 ´ 5 mm2, and the performance was as follows.

It produced delay times in the range of 106.9 to 193.9 ps in 5.8-ps increments over the dc-40 GHz frequency band. The 5.8-ps delay increment represents a phase shift of 22.5° at 10.8 GHz and is obtained by using microstrip lines with a length of 600 mm. The measured performance is shown. An examination of the figure reveals that, in the first place [Figure 5.10(a)], the return loss for all states and over most of the frequency band remains substantially close to 20 dB, and the insertion loss variation is rather narrow. In fact, the detailed measurements of Kim et al. [23] indicate that the insertion loss for all states stayed within 0.4 dB (2.2?2.6 dB) at 10 GHz and 0.7 dB (3.6?4.3 dB) at 30 GHz. On the other hand, the excellent phase shift linearity characteristic of the TTD circuit is observed in Figure 5.10(b), with a phase difference of 343° between the shortest and longest paths at 10.8 GHz.

In terms of group delay, Figure 5.10(c) reveals that the behavior exhibited by the matched and unmatched single-bit phase shifter is also manifested in the case of the complete 4-bit circuit, particularly as it pertains to the onset of growth in group delay ripple at 15 GHz. Up to this frequency, the group delay of the unmatched circuit is flat; beyond it, the ripple increase causes the delays from different states to overlap each other [23].

At the same time, the delay exhibited by the matched TTD circuit remains essentially flat up to 40 GHz. Figure 5.10(d) shows the insertion loss and time delay information of the 4-bit TTD network for all switch (states) positions. Finally, in order to obtain maximum metal-to-metal contact and, thus, minimum insertion loss, the switch control voltage employed to set the close state was 98V.

Lessons Learned. Detailed impedance matching is essential for obtaining good performance in switched-line TTD phase shifter circuits. Excellent insertion loss performance may be obtained at the expense of overdriving the MEMS switches in order to ensure the lowest insertion loss. Through proper design and fabrication it is possible to obtain high-yielding metal-to-metal contact MEMS switches.