Applications of Multiplexers

Multiplexers are used in a wide variety of applications. Their primary use is to route data from multiple sources to a single destination. Other than its use as a Data router, a parallel to serial converter, logic function generator and used for operation sequencing.

digital logic design  Applications of Multiplexers

1. Data Routing

A two digit 7-Segment display uses two 7-Segments Display digits connected to two BCD to 7-Segment display circuits. To display the number 29 the BCD number 0010 representing the MSD is applied at the inputs of the BCD to 7-Segment display circuit connected to the MSD 7-Segment Display Digit. Similarly, the BCD input 1001 representing the numbers 9 is applied at the inputs of the LSD display circuit. The circuit uses two BCD to 7-Segment decoder circuits to decode each of the two BCD inputs to the respective 7Segment display outputs. Figure 18.5. The display circuit can be implemented using a single BCD to 7-Segment IC and a Multiplexer.
digital logic design  Applications of Multiplexers

To fully understand the working of the alternate circuit it is essential to understand the working of the 7-Segment Display Digit. 7-Segment Display Digits are implemented using 7 LEDs (Light Emitting Diodes) connected in the form of number 8. To turn on a LED, its Anode is connected to +5 volts and its Cathode is connected to Ground or 0 volts. 7-Segment displays are of two types, the Common Anode type and the Common Cathode type.

a. Common Anode 7-Segment Display

The Common Anode 7-Segment Display has positive end of each of the seven display segments (LEDs) connected together. To display any segment the Common Anode of the display has to be connected to +5 volts and the other end of each segment has to be connected to 0 volts. Figure 18.6a

b. Common Cathode 7-Segment Display

The Common Cathode 7-Segment Display has negative end of each of the seven display segments (LEDs) connected together. To display any segment the Common Cathode of the display has to be connected to 0 volts and the other end of each segment has to be connected to +5 volts. Figure 18.6b.

digital logic design  Applications of Multiplexers

The alternate 2-digit display circuit based on a multiplexer and a BCD to 7-Segment Decoder is shown in figure 18.7. The BCD numbers of the two digits to be displayed are applied at the inputs A and B of the multiplexer. The 4-bit output of the Multiplexer is connected to the 4-bit input of the BCD to 7-Segment Decoder circuit. The 7-Segment output of the Decoder is connected to the 7 segments of both the Common Cathode Displays. The MSD/LSD input is connected to the select input of the Multiplexer, the Common Cathode of the MSD and the Common Cathode of the LSD through a NOT gate. The MSD is applied at Input A, and the LSD at input B. To Display the MSD the MSD/LSD input is set to 0. The BCD number at Input A of the multiplexer is selected and routed through the BCD to 7-Segment Decoder to both the two 7-Segment Displays. Since the MSD/LSD input is 0 therefore the MSD display is selected and the MSD is displayed. The MSD/LSD input is switched to 1, which selects the BCD at input B which is routed through the Multiplexer to the 7-Segment Decoder and ultimately to the 7-segment displays. Since the MSD/LSD is set to 1, the Common Cathode of the LSD is connected to zero, thus the number at input B of the multiplexer is displayed on the LSD display. The MSD/LSD input is rapidly switched between 0 and 1 to allow both the digits to be seen on the 2-digit display. This circuit can be expanded to incorporate any number of digits.

digital logic design  Applications of Multiplexers

Figure 18.7 2-Digit Decimal Display using a Multiplexer
2. Parallel to Series Conversion

In a Digital System, Binary data is used and represented in parallel. Parallel data is a set of multiple bits. For example, a nibble is a parallel set of 4-bits, a byte is a parallel set of 8 bits. When two binary numbers are added, the two numbers are represented in parallel and the parallel adder works and generates a sum term which is also in parallel.

Transmission of information to remote locations through a piece of wire requires that the parallel information (data) be converted into serial form. In a serial data representation, data is represented by a sequence of single bits. An 8-bit parallel data can be transmitted through a single piece of wire 1-bit at a time. Transmitting 8-bits simultaneously (in parallel form) requires 8 separate wires for the 8-bits. Laying of 8 wires across two remote locations for data transfer is expensive and is therefore not practical. All communication systems set up across remote locations use serial transmission.

An 8-bit parallel data can be converted into serial data by using an 8-to-1 multiplexer such as 74X151 which has 8 inputs and a single output. The 8-bit data which is to be transmitted serially is applied at the 8 inputs I0-7 of the multiplexer. A three bit counter which counts from 0 to 7 is connected to the three select inputs S0, S1 and S2. The counter is connected to a clock which sends a clock pulse to the counter every 1 millisecond. Initially, the counter is reset to 000, the I0 input is selected and the data at input I0 is routed to the output of the multiplexer. On receiving the clock signal after 1 millisecond the counter increments its count from 000 to 001 which selects I1 input of the multiplexer and routes the data present at the input to the output. Similarly, at the next clock pulse the counter increments to 010, selecting I2 input and routing the data to the output. Thus after 8 milliseconds the parallel data is routed to the output 1-bit at a time. The output of the multiplexer is connected to the wire through which the serial data is transmitted. Figure 18.8

digital logic design  Applications of Multiplexers

Figure 18.8a Parallel to Serial Conversion

3. Logic Function Generator

Multiplexers can be used to implement a logic function directly from the function table without the need for simplification. The select inputs of the multiplexer are used as the function variables. The inputs of the multiplexer are connected to logic 1 and 0 to represent the missing and available terms. The three variable function table and its 8-to-1 multiplexer based function implementation is shown in figure 18.9

digital logic design  Applications of Multiplexers

Input Output
A B C Y
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1

4. Operation Sequencing

Many industrial applications have processes that run in a sequence. A paint manufacturing plant might have a four step process to manufacture paint. Each of the four steps runs in a sequence one after the other. The second step can not start before the first step has completed. Similarly, the third and fourth step of the paint manufacturing process can not proceed unless steps two and three have completed. It is not necessary that each of the manufacturing steps is of the same duration. Each manufacturing step can have different time duration and can be variable depending upon the quantity of paint manufactured or other parameters. Normally, the end of each step in the manufacturing process is indicated by a signal which is actuated by some machine which has completed its part of the manufacturing process. On receiving the signal the next step of the manufacturing process is initiated.

digital logic design  Applications of Multiplexers

The entire sequence of operations is controlled by a Multiplexer and a Decoder circuit. Figure 18.10. The manufacturing processes are started by resetting the 2-bit counter to 00. The counter output is connected to the select input of the Multiplexer and the inputs of the Decoder which selects the Multiplexer input I0 is and activates the Decoder output Y0. The Decoder output is connected to initiate the first process. When the process completes it indicates the completion of the process by setting its output to logic 1. The output of Process 1 is connected to I0 input of the Multiplexer. When Process 1 sets its output to 1 to indicate its completion, the logic 1 is routed by the Multiplexer to the clock input of the 2-it counter. The counter on receiving logic 1 increments its count to 01, which selects I1 input of the Multiplexer and the Y1 output of the Decoder. The input to Process 1 is deactivated and Process 2 is activated by Y1. On completion of Process 2 its output is set to logic 1, which is routed by the multiplexer to the clock input of the 2-bit counter which increments to the next count. This continues until Process 4 signals its completion after which the Decoder and the Multiplexer is deselected completing the manufacturing process.

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