Applications of Edge-Triggered J-K Flip-flop
Digital Logic & DesignApplications of Edge-Triggered J-K Flip-flop
1. J-K flip-flop used as sequence detector
Some digital applications require that the inputs be applied in a certain sequence to activate an output. This is possible with J-K flip-flops. Figure 24.11

Figure 24.11a J-K flip-flop connected to respond to a particular input sequence

2. J-K flip-flop used as frequency divider
In digital circuit different parts of the circuit can operate at different frequencies obtained from the master clock frequency. For example, three different parts of a digital system might operate at 4 MHZ, 2 MHZ and 1 MHZ clock frequency respectively. Same clock source should be used (instead of three separate clock sources) to maintain synchronization between the three parts. A clock frequency can be divided by 2 using a J-K flip flop. The J-K inputs of the flip-flop are connected to logic high (1). At each clock transition the output of the flip-flop toggles to the alternate state. Figure 24.12. A 4MHz clock signal can be divided into 2 MHZ and 1 MHZ signal using two J-K flip-flops connected together. Figure 24.13.

Figure 24.12a J-K flip-flop connected as frequency divider

CLOCK Input
F0 Output
F1 Output

Figure 24.13b Timing diagram of J-K divide-by-4 frequency divider
3. J-K flip-flop used as a shift register
Binary numbers can be multiplied or divided by a constant 2 by shifting the binary numbers left or right by 1-bit respectively. Multiplication and Division by a factor of 2n, (where n = 1, 2, 3, 4 ….) can be achieved by shifting the binary by n bits to the left or right respectively. Binary numbers can be easily shifted in the left or right direction by using J-K flip-flop based shift registers. figure 24.14.

| CLOCK Input | Figure 24.15a 2-bit up-counter | ||
| F0 Output | |||
| F1 Output | |||
| Figure 24.15b Timing diagram of a 2-bit up-counter t1 t2 t3 t4 t5 t6 | |||



Recent Comments